Semiconductor wafer and method for fabrication thereof

ABSTRACT

There is disclosed a semiconductor wafer obtained, at least, by removing a mechanical damage layer by etching both surfaces of the wafer, flattening one of the surfaces by a surface-grinding means, polishing both of the surfaces, and then subjecting a front surface of the wafer to a finishing mirror-polishing when defining the surface subjected to surface-grinding as a back surface of the wafer, and a method for fabricating it. There can be provided a method for fabricating a semiconductor wafer wherein grinding striations which remain on a semiconductor wafer even when double side polishing and finishing mirror-polishing are conducted after a conventional step of surface-grinding of the front surface or the both surfaces, are eliminated to improve quality of the front surface of the wafer, and the back surface having a quality suitable for the device process can be obtained, and a semiconductor wafer obtained thereby.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a semiconductor wafer, andespecially a method for fabrication of a single crystal silicon wafer.

[0003] 2. Description of the Related Art

[0004] Generally, a conventional method for fabricating a semiconductorwafer comprises a slicing step to obtain wafers of a thin disc shape byslicing a single crystal silicon ingot pulled with a single crystalpulling apparatus; a coarse chamfering step to chamfer a peripheral edgeportion of the sliced wafer in order to prevent cracking or breakage ofthe wafer; a lapping step to flatten both of the front surface and theback surface of the chamfered wafer; a cleaning or etching step toremove a remaining mechanical damage layer formed by the chamfering stepand lapping step; and a mirror-polishing step to mirror-polish the frontsurface of the etched wafer. As shown in FIG. 1[B], adding to thesesteps, there can be conducted by combination of a step ofsurface-grinding the front surface or the both surfaces of the wafer, adouble side polishing step for polishing both surfaces of thesurface-ground wafer, a finishing chamfering step to mirror-polish aperipheral edge portion of the wafer before and after the double sidepolishing step, the finishing polishing step to mirror-polish the wafersubjected to the double side polishing, and a cleaning step for removinga polishing agent remaining on the polished wafer and contaminant inorder to improve cleanness.

[0005] In the above-mentioned method for fabrication, thesurface-grinding step has been introduced to support the lappingprocess, since high flatness of the wafer cannot be achieved only by thelapping process when a diameter of the wafer is large, especially morethan 300 mm.

[0006] However, in the surface-ground wafer, grinding striations(streaks) remain as observed with a magic mirror, even after it ispolished in a considerable amount. Furthermore, if it is polished in aconsiderable amount, the wafer may lose its proper shape, and flatnessthereof is degraded.

[0007] For example, grinding striations formed at the most peripheralportion during surface-grinding of the front surface or the bothsurfaces of the wafer have a P-V value of about 0.2 to 0.1 μm and astriation interval of about 1 to 10 mm. Accordingly, the shape of thepolishing cloth is copied (followed) to the shape of the grindingstriations when it is subjected to double side polishing, so thatgrinding striations remain as micro roughness having a P-V value ofabout 30 to 50 nm, even after a finishing mirror-polishing step.

[0008] In the case of the wafer having high flatness wherein bothsurfaces are subjected to mirror-polishing, flatness on the back surfaceis too good, which may easily cause problems in a device process, suchas indistinguishability of the front surface from the back surface,necessity of re-adjustment of sensing sensitivity, difficulty ofchucking and releasing the wafer, and liabilities in a conveying linesuch as contamination.

SUMMARY OF THE INVENTION

[0009] The present invention has been accomplished to solve theabove-mentioned conventional problems, and an object of the invention isto eliminate the grinding striations which remain on the front surfaceeven when double side polishing and front surface finishingmirror-polishing are conducted after the above-mentioned conventionalstep of surface-grinding of the front surface or the both surfaces, toimprove the quality of the front surface of the wafer, and to providethe semiconductor wafer having a proper quality in the back surfacesuitable for the device process, and a method for fabricating it.

[0010] To achieve the above-mentioned object, the present inventionprovides a semiconductor wafer obtained, at least, by removing amechanical damage layer by etching both surfaces of the wafer,flattening one of the surfaces by a surface-grinding means, polishingboth of the surfaces, and then subjecting a front surface of the waferto a finishing mirror-polishing when defining the surface subjected tosurface-grinding as a back surface of the wafer.

[0011] The wafer is excellent in flatness on both surfaces, andcondition of the surfaces is different from each other. For example, thefront surface is finished to be a mirror surface having no microroughness formed during surface-grinding, and the back surface isfinished to be a surface on which micro roughness (P-V value=about 30 to50 nm, interval=about 1 to 10 mm) remains as grinding striations.

[0012] When the wafer of the present invention is used, there are nogrinding striations remaining on the front surface which are formed inthe case of the conventional wafer fabricated by conducting lapping ofthe both surfaces, surface-grinding of the front surface or the bothsurfaces, double side polishing, and mirror-polishing. Furthermore, whenthe wafer of the present invention is chucked at the back surfacethereof, there are no problems, which may be easily caused in a deviceprocess because of too good flatness of the back surface, such asindistinguishability of the front surface from the back surface,necessity of re-adjustment of sensing sensitivity, difficulty ofchucking and releasing the wafer, and liabilities in a conveying linesuch as contamination. Furthermore, the grinding striations on the backsurface are never transferred on the front surface in fabrication of thewafer of the present invention. Accordingly, it can be used in a processof highly integrated devices, productivity and yield of a device can beimproved, and cost can be significantly reduced.

[0013] The present invention also provides a method for fabricating asemiconductor wafer comprising at least slicing a wafer from asemiconductor ingot, lapping both surfaces of the wafer, removing amechanical damage layer by etching treatment, flattening one of thesurfaces by a surface-grinding means, polishing both of the surfaces,and then subjecting a front surface of the wafer to a finishingmirror-polishing when defining the surface subjected to surface-grindingas a back surface of the wafer.

[0014] According to the above-mentioned method comprising the doubleside lapping step, the single side surface-grinding step, the doubleside polishing step and the step of subjecting the other surface thanthe above ground surface to a finishing mirror-polishing, a wafer havinghigh flatness can be easily fabricated at low cost, as compared with theconventional method comprising a double side lapping step, a step ofgrinding a front surface or both surfaces, a double side polishing stepand a mirror-polishing step. Furthermore, a problem of grindingstriations remaining on the surface, which is one of disadvantages inthe conventional method, can be solved, and a wafer having a frontsurface comprising a mirror surface without grinding striations andmicro roughness and a back surface with desired grinding striations, canbe fabricated easily and at low cost.

[0015] In this case, it is preferable to conduct mirror edge polishingbefore or after polishing both of the surfaces described above.

[0016] When the mirror edge polishing (mirror-polishing on chamferededge) is conducted before or after the double side polishing step,defects such as cracking or breakage of the wafer can be preventedduring polishing or in a device process. The mirror edge polishing ismore effective, since it is conducted after the peripheral edge portionof the wafer is ground for coarse chamfering before the lapping step inorder to prevent cracking or breakage of the wafer or the like duringlapping and a surface-grinding.

[0017] It is preferable to etch the wafer by a wet etching method usingan alkali solution as a etching solution.

[0018] Thereby, it is possible to remove a mechanical damage layer ofthe wafer, maintaining flatness achieved by the double side lappingstep, and to conduct a polishing step effectively with maintaining highflatness, in cooperation with the following single side grinding. Astock removal of the wafer in the etching treatment can be minimal forremoving the mechanical damage layer.

[0019] As described above, according to the present invention, asemiconductor wafer having the front surface which is a mirror surfacewith high flatness and high brightness and without micro roughness andthe back surface having appropriate fine grinding striations can befabricated easily and at low cost. Accordingly, when the wafer ischucked in a device process, the grinding striations on the back surfaceare never transferred on the front surface of the wafer of the presentinvention, and it can be used in a process of highly integrated devices,productivity and yield of a device can be improved in a device process,and cost can be significantly reduced.

BRIEF DESCRIPTION OF THE DRAWINGS

[0020]FIG. 1(A) is a flow chart showing a method of fabricating asemiconductor wafer from a semiconductor ingot according to the presentinvention, and a surface condition of the wafer.

[0021]FIG. 1(B) is a flow chart showing a conventional method offabricating a semiconductor wafer from a semiconductor ingot, and asurface condition of the wafer.

[0022]FIG. 2 is a schematic view showing a double side lapping apparatusused in the method of the present invention.

[0023]FIG. 3 is a schematic view showing a single side surface-grindingapparatus used in the method of the present invention.

[0024]FIG. 4 is a schematic view showing a double side polishingapparatus used in the method of the present invention.

[0025]FIG. 5 is a schematic view showing a single side finishingmirror-polishing apparatus used in the method of the present invention.

DESCRIPTION OF THE INVENTION AND EMBODIMENT

[0026] The present invention will now be described in detail, but thepresent invention is not limited thereto.

[0027] The inventors of the present invention have found that it ispreferable to use a surface formed by lapping without grindingstriations as a front surface, and to use the other surface withgrinding striations easily remaining after surface-grinding as a backsurface of the wafer, in order to fabricate a wafer wherein grindingstriations are eliminated which remain on the front surface even whendouble side polishing and finishing mirror-polishing are conducted,after a conventional lapping step and a step of surface-grinding a frontsurface or both surfaces of the wafer described above, and wherein thereis no damage or problem relating to the back surface condition formed ina device process, and thereby both quality of the front surface andcondition of the back surface can be improved, and have completed thepresent invention by defining combination of each step such as a lappingstep, a surface-grinding step, a polishing step and a mirror-polishingstep, and various conditions thereof.

[0028] An example of a method for fabricating a semiconductor wafer froma semiconductor ingot will be explained below with reference todrawings. FIG. 1(A) is a flow chart schematically showing a method offabrication according to the present invention, and a surface conditionof the wafer obtained in each step.

[0029] The method of fabrication shown in FIG. 1(A) substantiallycomprises the following eight steps.

[0030] (1) A slicing step of slicing a semiconductor single crystalingot into a thin disc-shape wafer 1 (see FIG. 1[A](a)).

[0031] (2) A coarse chamfering step of chamfering a peripheral edgeportion of the wafer 1 obtained through the slicing step. At a chamferedportion of the wafer 1 subjected to the coarse chamfering, mechanicaldamage 2 is generated (see FIG. 1[A](b)).

[0032] (3) A lapping step of flattening a chamfered wafer, where bothsurfaces of the wafer are ground with pouring a lapping solutioncontaining abrasive grains by a lapping apparatus. Mechanical damage 2is generated on the lapped wafer 1 (see FIG. 1[A](c)).

[0033] (4) The lapping powder adhered to the both surface of the lappedwafer 1 is removed by cleaning or etching. The mechanical damage 2 canbe removed to some extent or almost completely by cleaning or etching.At the same time, etch pit 3 is generated on the wafer 1 by etching (seeFIG. 1[A](d)).

[0034] (5) One surface 1 a of the cleaned or etched wafer 1 is subjectedto surface-grinding to achieve high flatness of the surface. Themechanical damage 2 and the grinding striations 4 are generated on thesurface 1 a of the wafer 1 subjected to surface-grinding (see FIG.1[A](e)).

[0035] (6) A polishing step of polishing both surfaces 1 a, 1 b of thewafer 1 wherein one surface 1 a is ground. The mechanical damage 2 andthe etch pit 3 on the both surfaces 1 a, 1 b of the wafer 1 are removedby the polishing step, but grinding striations remain on the surface 1 awhich was surface-ground (see FIG. 1[A](f)).

[0036] (7) The peripheral edge portion of the wafer 1 is mirror-polishedbefore or after the double side polishing step. Thereby, the mechanicaldamage 2 and the etch pit 3 at the peripheral edge portion of the wafer1 are removed. (see FIG. 1[A](f)).

[0037] (8) The surface 1 a of the wafer 1 which is surface-ground isdefined as a back surface, and a front surface of the wafer 1 subjectedto the double side polishing is subjected to a finishingmirror-polishing. Thereby, there can be obtained the semiconductor waferhaving a front surface 1 b and a back surface 1 a which issurface-ground (see FIG. 1[A](g)).

[0038] (9) A cleaning step of cleaning and drying the wafer afterpolishing (not shown).

[0039] Next, a lapping apparatus, a surface-grinding apparatus and apolishing apparatus used in the present invention and processingcondition will be explained below.

[0040] In a flattening step, a lapping apparatus is used at first. FIG.2 shows an example of double side lapping apparatus used in the methodof the present invention.

[0041] A sliced wafer 1 is set between the lapping turn tables (theupper turn table 11 and the lower turn table 12) which are faced eachother vertically. Lapping solution 17, which is generally a mixture ofalumina or silicon carbide abrasive grains and glycerol is poured from alapping solution nozzle 16 to a space between the lapping table and thewafer, in order to mechanically grind both surface of the wafer byrotating the lapping table for rubbing with pressing it on the waferunder pressure.

[0042] The upper turn table 11 and the lower turn table 12 are rotatedin opposite directions to each other. A center gear (sun gear) 13 isprovided on the lower turn table 12, and an internal gear 14 is providedon the outer periphery of the lower turn table 12. Plural gearedcarriers 15 carrying plural wafers 1 each set in a wafer receiving hole,are interposed between the upper and lower lapping turn tables, androtated and revolved between the center gear 13 and the internal gear14. Thereby, the plural wafers 1 can be lapped at the same time under anadequate pressure applied by the upper turn table 11.

[0043] Next, the surface-grinding apparatus will be explained. It is anapparatus for grinding the wafer with a grinding wheel (grinding stone)after lapping and etching treatment to achieve higher flatness. As suchan apparatus, a double side grinding apparatus for grinding bothsurfaces of the wafer at the same time, an infeed surface-grindingapparatus for grinding one surface or the like, are well known. In themethod of the present invention, the latter is used. One example of theapparatus is shown in FIG. 3.

[0044] In the infeed surface-grinding apparatus 20, the wafer 1 lappedas described above is fixed on a rotatable suction plate 21 having asuction type fixing mechanism, and rotated by a suction plate drivingmotor 24, and the front surface or the back surface of the wafer can beground with a cup-like grinding wheel 22 driven at high speed by agrinding wheel driving motor 23. When the wafer 1 is fixed with vacuum,a vacuum source (not shown) to which a vacuum pipe 25 is connected, isused.

[0045] The double side polishing apparatus used in a double sidepolishing step is for mechanochemically polishing both surfaces of thewafer having stable thickness accuracy and flatness accuracy, subjectedto the slicing step, the chamfering step, the flattening step and theetching step.

[0046] Various polishing methods can be applied to the double sidepolishing described above. For example, the double side polishingapparatus shown in FIG. 4 will be explained below.

[0047] A wafer 1 subjected to surface-grinding is set between polishingpads 33, 34 consisting of polyurethane foamed layer or the like adheredon the turn tables (the upper turn table 31 and the lower turn table 32)of the double side polishing apparatus 30 which are faced each othervertically. With pouring a polishing solution 39 generally consisting ofpolishing abrasive grains such as silica suspended in an alkali solutionfrom a polishing solution nozzle 38 to a space between the polishing padand the wafer, to mechanochemically polish both surfaces of the wafer byrotating them for rubbing under pressure.

[0048] The upper turn table 31 and the lower turn table 32 are rotatedin opposite directions to each other. A center gear (sun gear) 35 isprovided on the lower turn table 32, and an internal gear 36 is providedon the outer periphery of the lower turn table 32. A plurality of gearedcarriers 37 carrying plural wafers 1 each set in a wafer receiving hole,are interposed between the upper and lower turn tables, and are rotatedand revolved between the center gear 35 and the internal gear 36.Thereby, both surfaces of the plural wafers 1 can be polished at thesame time under an adequate pressure applied by the upper turn table 31.

[0049] The finishing mirror-polishing is conducted on one surface of thewafer in the method of the present invention. For example, it isconducted through use of a single side polishing apparatus 40 shown inFIG. 5 as follows. The back surface of the wafer 1 is fixed to a waferholder 42 rotating with a holder shaft 47, using an adhesive such as waxwhich can be easily removed in the later cleaning step. With pouring apolishing agent 44 generally consisting of polishing abrasive grainssuch as silica suspended in an alkali solution from a nozzle 43 for apolishing agent to a space between the polishing cloth 45 and the wafer1, a polishing cloth 45 consisting of polyurethane foamed layer or thelike adhered on the turn table 41 is rotated with a turn table rotatingshaft 46 at relative speed, with being loaded, to mirror-polish onlyfront surface of the wafer mechanochemically.

[0050] In that case, other than the above-mentioned method wherein theback surface of the wafer is held by adhering it with wax, there is amethod wherein the back surface of the wafer is held by a vacuum suctionrevolving carrier without using wax, or a method wherein the backsurface of the wafer is held with a soft resin without using wax. Anyother methods can be used in the present invention, and the method ofthe finishing mirror-polishing is not restricted to the above.

[0051] In the cleaning step, cleaning is conducted with, for example,SC-1 essentially comprising aqueous ammonia and hydrogen peroxideaqueous solution or SC-2 essentially comprising hydrochloric acid andhydrogen peroxide aqueous solution, in order to remove a polishing agentor the like adhered on the front surface of the wafer produced in theabove-mentioned front surface finishing mirror-polishing step, andimprove cleanness of the front and back surface.

[0052] In the wet etching step in the present invention, the mechanicaldamage layer formed on the front and back surface of the wafer formed ina flattening step according to a double side lapping method can beremoved by chemical etching. An etching solution can be acid, alkali orthe like. However, the flatness may be lowered depending on the kinds ofthe etching solution, a stirring condition of the etching solutionduring etching treatment, and progressing condition of the reaction.According to the present invention, the flatness does not need to becared so much since the flatness can be improved by the later surfacegrinding step. However, it is preferable to conduct etching withoutspoiling the flatness obtained in the lapping step. The inventors madeexperiments, and revealed that the best etching solution is an alkalisolution such as a 45 to 50% aqueous solution of sodium hydroxide orpotassium hydroxide.

EXAMPLE

[0053] The following example is being submitted to further explainspecific embodiment of the present invention. This example is notintended to limit the scope of the present invention.

Example

[0054] Semiconductor wafers were fabricated from a semiconductor ingotaccording to the method shown in FIG. 1[A](a) to (g). 200 of them weredetermined as for their quality.

[0055] The apparatuses described above, namely, a double side lappingapparatus, a single side grinding apparatus, a double side polishingapparatus, a single side finishing mirror-polishing apparatus or thelike were mainly used.

[0056] The wafers having a diameter of 300 mm and a thickness of 975 μmwere obtained as a starting material by a slicing step, and subjected tolapping, grinding, polishing and the like.

[0057] The steps of lapping, grinding and polishing were conducted asfollows with varying conditions therefor.

[0058] The double side lapping step was conducted varying a stockremoval in the range from 80 to 200 μm as a value of those of bothsurfaces put together.

[0059] The etching step was conducted using an alkali solution or acidsolution with a sufficient stock removal to remove a mechanical damagelayer formed during lapping.

[0060] The single side grinding was conducted using a grinding wheelsuch as a resin bond of #2000 to #4000 with a stock removal of 10 to 20μm.

[0061] The double side polishing was conducted with a stock removal of10 to 20 μm as a value of those of both surfaces put together, providedthat the stock removal was determined so that the mechanical damagelayer formed during a single side grinding can be removed.

[0062] The double side polishing was conducted using a foamed urethanepolishing cloth or a rigid urethane polishing pad (polishing cloth) as apolishing cloth. A polishing agent containing colloidal silica was used.

[0063] Even after the above-mentioned double side polishing, grindingstriations remained. The grinding striation is different from themechanical damage, but is a shape formed on the surface by a grindingwheel, namely like undulation, which remains even after the double sidepolishing.

[0064] The surface on which the grinding striations remained wasdetermined as a back surface, the other surface, namely the frontsurface was subjected to a finishing mirror-polishing. The polishing wasconducted with a stock removal of 1 to 2 μm by a copying polishingmethod wherein only the front surface of the wafer was mechanochemicallypolished to be a mirror surface.

[0065] After subjected to the cleaning step as a final step, the waferswere evaluated, and revealed excellent as follows.

[0066] (1) the flatness of the wafer was quite excellent as 0.20 μm asrepresented by SBIR_(max).

[0067] The flatness was measured through use of an electric capacitivesensing thickness measuring apparatus (Galaxy-AFS manufactured by ADEcorporation), and represented by SBIR_(max) (Site Back-side Ideal Range:a standardized value according to SEMI standard M1 or the like, a cellsize of 25×25).

[0068] (2) The front surface of the wafer was finished as a mirrorsurface having high brightness with no grinding striations nor microroughness similar thereto.

[0069] (3) On the back surface, there remained grinding striations asmicro roughness having a P-V value of about 30 to 50 mm and an intervalof about 1 to 10 mm. However, they were very fine, and therefore, thegrinding striations on the back surface were not transferred to thefront surface of the wafer when the wafer was chucked during deviceprocess.

[0070] P-V value shows a kind of microroughness, and is measured throughuse of NANOMETRO 330F (a laser displacement measuring apparatusmanufactured by Kuroda Seikousha) in an area of 20 mm×5 mm. The P-Vvalue is a maximal difference between a peak and a valley.

[0071] The wafer of the present invention were determined in the devicestep as for the problems in a device process, such asindistinguishability of the front surface from the back surface,necessity of re-adjustment of sensing sensitivity, difficulty ofchucking and releasing the wafer, and liabilities in a conveying linesuch as contamination, which were easily caused in the case of the waferwherein both surfaces were mirror-polished and had high flatness becauseflatness on the back surface was too good. Such problems were not causedin the wafer of the present invention.

[0072] The present invention is not limited to the above-describedembodiment. The above-described embodiment is a mere example, and thosehaving the substantially same structure as that described in theappended claims and providing the similar action and effects areincluded in the scope of the present invention.

[0073] For example, the silicon wafer having a diameter of 300 mm (12inches) was processed in the embodiment of the present invention.However, the present invention is applicable to the wafer having a largediameter such as 200 mm (8 inches) to 400 mm (16 inches) or more.Therefore, these modifications are included within the scope of thepresent invention.

[0074] Furthermore, the method of the embodiment of the presentinvention comprises the steps shown in FIG. 1[A]. The present inventionis not limited to the steps shown there. There can be further added aheat treatment step, a cleaning step or the like, some of the steps canbe omitted, and the sequence of the steps can be changed.

What is claimed is:
 1. A semiconductor wafer obtained, at least, byremoving a mechanical damage layer by etching both surfaces of thewafer, flattening one of the surfaces by a surface-grinding means,polishing both of the surfaces, and then subjecting a front surface ofthe wafer to a finishing mirror-polishing when defining the surfacesubjected to surface-grinding as a back surface of the wafer.
 2. Amethod for fabricating a semiconductor wafer comprising at least slicinga wafer from a semiconductor ingot, lapping both surfaces of the wafer,removing a mechanical damage layer by etching treatment, flattening oneof the surfaces by a surface-grinding means, polishing both of thesurfaces, and then subjecting a front surface of the wafer to afinishing mirror-polishing when defining the surface subjected tosurface-grinding as a back surface of the wafer.
 3. The method forfabricating a semiconductor wafer according to claim 2 wherein mirroredge polishing is conducted before or after polishing both of thesurfaces.
 4. The method for fabricating a semiconductor wafer accordingto claim 2 wherein the etching treatment is conducted by a wet etchingmethod using an alkali solution as an etching solution.
 5. The methodfor fabricating a semiconductor wafer according to claim 3 wherein theetching treatment is conducted by a wet etching method using an alkalisolution as an etching solution.